Optimize Your Workflow
At ASC Sunstone, we aim for "First-Time-Right" manufacturing. To prevent engineering holds and technical clarifications, audit your design files against these common manufacturing pitfalls before submission.
1. Layer Stackup & Naming Conventions
Ambiguous file naming is a primary cause of CAM delays. To ensure the integrity of your layer order:
- Standardized Naming: Use logical, sequential naming for all Gerber layers (e.g., Top, L2_GND, L3_PWR, Bottom).
- Documentation: If using custom stackups or non-standard material increments, include a README or a .stackup file.
- Internal ID: Clearly identify internal signal and plane layers to avoid inversion or sequencing errors during CAM processing.
2. File Set Integrity
Incomplete datasets stop production immediately. Ensure your export package contains:
- Defined Board Outline: Provide a dedicated profile layer. If the outline exists on multiple layers or contradicts the order form dimensions, the job will be placed on hold.
- NC Drill Data: We require Excellon drill files. ASC Sunstone does not generate drill data from fabrication drawings.
- One Build per Archive: Do not include multiple revisions or "extra" file sets in a single ZIP. Provide only the active Gerber set intended for fabrication.
3. Order Form & Data Synchronization
Our automated quoting engine relies on the parity between your order form and your design files.
- Attribute Matching: Explicitly check boxes for Via Fill, Blind/Buried Vias, and Controlled Impedance.
- Mechanical Features: Ensure all internal slots, cutouts, and NPTH (Non-Plated Through Holes) are defined in the outline layer and noted on the order form.
- Silkscreen Parity: Verify that the number of silk layers selected (None, Single, or Double-sided) matches the exported Gerber data.
4. Drill Spacing & Web Management (Blowouts)
Violating minimum drill-to-drill spacing compromises board structural integrity and plating quality.
- Via-to-Via Spacing: Maintain a minimum of 0.006" edge-to-edge clearance for all vias.
- Component Hole Spacing: Maintain a minimum of 0.016" edge-to-edge for non-via holes to allow for plating compensation and drill bit deflection.
- Perforations: Overlapping or "postage stamp" holes that exceed density limits may be removed or held for redesign.
5. Inner Layer Clearances (Copper-to-Hole)
Inadequate clearance on internal layers is the #1 reason for CAM holds.
- Keep out Zones: All holes (plated and non-plated) must maintain a minimum 0.020" clearance from any adjacent copper traces or ground planes.
- Short Prevention: Proper annular ring and clearance buffers are critical to preventing internal shorts during the lamination and drilling process.
6. Native Files & Engineering Review
For complex designs (4+ layers) or specific CAD formats:
- Native File Review: Designs requiring Limited Review (4+ layers) may require email confirmation of CAM edits. Monitor your inbox for "Engineering Questions" (EQs) to prevent timeline slippage.
Get Quote